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Intrinsic and Extrinsic Limits of Charge Carrier Mobility in Graphene

Speaker: Michael Fuhrer, University of Maryland College Park
Date & Time: February 19, 2008 - 1:30pm
Location: Serin E385

Intrinsic and Extrinsic Limits of Charge Carrier Mobility in Graphene
Physics and Astronomy

Michael Fuhrer, University of Maryland College Park
1:30 PM, Serin E385

Graphene, a single atom-thick sheet of graphite, is a zero-gap semiconductor with an unusual linear dispersion relation (analogous to the Dirac equation for massless relativistic particles) and a density of states that vanishes at a singular point. Graphene is
an exciting new condensed matter system, both for the opportunity to observe the physics associated with massless Dirac Fermions in the laboratory, and because of materials parameters which make it attractive for technological applications. However, in the few
years since the experimental realization of graphene, progress toward cleaner (higher mobility) samples has largely stalled. I will discuss experiments performed on atomically-clean graphene on SiO2[1] in ultra-high vacuum to determine the intrinsic and extrinsic limits of mobility in graphene[2,3], which point out both the promise of the
material as well as the technological challenges that lie ahead in realizing better graphene samples. Intrinsic scattering by the acoustic phonons of graphene[3] limits the room-temperature mobility to 2 x 105 cm2/Vs at a carrier density of 1012 cm-2, higher than any
known material. However, extrinsic scattering due to charged impurities in the substrate[2] and substrate polar optical phonons[3] currently impose much more severe limits on the mobility, pointing out the importance of substrate engineering for improving graphene devices[4].

[1] "Atomic Structure of Graphene on SiO2," Masa Ishigami, J. H. Chen, W. G. Cullen, M. S. Fuhrer, and E. D. Williams, Nano Letters 7, 1643 (2007).
[2] "Charged Impurity Scattering in Graphene," J. H. Chen, C. Jang, M. S. Fuhrer, E. D. Williams, and M. Ishigami, arXiv:0708.2408.
[3] "Intrinsic and Extrinsic Performance Limits of Graphene Devices on SiO2," J. H. Chen, C. Jang, S. Xiao, M. Ishigami, M. S. Fuhrer, arXiv:0711.3646.
[4] "Printed Graphene Circuits," Jian-Hao Chen, Masa Ishigami, Chaun Jang, Daniel R. Hines, Michael S. Fuhrer, and Ellen D. Williams, Advanced Materials 19, 3623 (2007).

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